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| Ordering number : EN5829A CMOS IC LC895926 CD-R Encoder/Decoder IC with Built-in SCSI Interface Overview The LC895926 is a CD-R IC that provides a wide range of functions including CD-ROM decoding (including ECC) and encoding, subcode encoding and decoding, CD encoding, ATIP decoding and CLV servo, and a SCSI interface that includes the register block. * Built-in multiblock transfer function for transferring multiple blocks in a single operation. * Automatic sequencing of encoding and decoding processing for a reduced processing load on the system microcontroller. Package Dimensions unit: mm 3153A-QFP160E [LC895926] Features * ECC and EDC correction/addition for CD-ROM data (during decoding and encoding) * Subcode decoding/encoding complete with error detection and error correction * ATIP decoding and CRC checking for both encoding and decoding * CLV servo control using ATIP data during encoding * CIRC code insertion and EFM modulation during encoding * Access to buffer RAM from microcontroller via LC895926 * Built-in SCSI interface * Speeds of 24x for decoding and 12x for encoding * Transfers speeds of 10 megabytes/s (synchronous) and 5 megabytes/s (asynchronous) with 16-bit 50-ns EDODRAMs * Buffer RAM sizes between 1 and 32 megabits (using 16bit EDO-DRAMs) * User control over sizes of CD main channel, C2 flag, and subcode areas in buffer RAM * Built-in batch transfer function for transferring entire CD main channel, C2 flag, or subcode area in a single operation. SANYO: QIP160E SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 51398HA (OT) No. 5829-1/7 LC895926 Specifications Absdute Maximum Ratings at Ta = 25C, VSS = 0 V Parameter Maximum power supply voltage I/O voltage Allowable power dissipation Operating temperature Storage temperature Solder resistance (Pins only) Symbol VDD max VI, VO Pd max Topr Tstg 10 seconds Ta 70C Conditions Ratings -0.3 to +7.0 -0.3 to VDD+0.3 600 -30 to +70 -55 to +125 260 Unit V V mW C C C Allowable Operating Ranges at Ta = -30 to +70C, VSS = 0 V Parameter Power supply voltage Input voltage range Symbol VDD VIN 3.3V min 3.0 0 typ 3.3 max 3.6 VDD min 4.5 0 5V typ 5.0 max 5.5 VDD Unit V V DC Characteristics at Ta = -30 to +70C, VSS = 0 V, VDD = 4.5 to 5.5 V Parameter Input high level voltage Input low level voltage Input high level voltage Input low level voltage Input high level voltage Input low level voltage Output high level voltage Output low level voltage Output high level voltage Output low level voltage Output high level voltage Output low level voltage Output low level voltage Input leak current Pull-up resistance Symbol VIH VIL VIH VIL VIH VIL VOH VOL VOH VOL VOH VOL VOL IIL RUP Conditions Ratings min 2.2 0.8 2.2 0.8 2.5 0.6 VDD -- 2.1 0.4 VDD -- 2.1 0.4 VDD -- 2.1 0.4 0.4 -10 40 80 +10 160 typ max Unit V V V V V V V V V V V V V A k TTL levels, for pins (1) and (6) TTL levels, for pin (4), with pull-up resistors TTL levels, for pins (0) and (7), with Schmitt inputs IOH = -2 mA, for pin (3) IOL = 2 mA, for pin (3) IOH = -2 mA, for pins (2), (4), and (6) IOL = 2 mA, for pins (2), (4), and (6) IOH = -48 mA, for pin (7) IOL = 48 mA, for pin (7) IOL = 2 mA, for pin (5) VI = VSS, VDD, for pins (0), (1), (6), and (7) For pins (4) and (5) The pins above refer to the following groups. Input (0) BCK, BICLKIN, BIDATAI, C2PO, LOCKIN, LRCK, PLLOUTIN, ROUGH, SBSO, SCOR, SDATA, WFCK, CS, RD, WR (1) SUA0 to SUA7, TEST0 to TEST6, RESET Output (2) CLV+, CLV-, FSW (3) EFM, EFMG, EFMGATE0 to EFMGATE3, EXCK, LOCK, MON, RA0 to RA9, SUBSYNC, CAS0 to CAS1, RAS0 to RAS1, LWE, UWE, OE Input (4) D0 to D7, IO0 to IO15 (5) INT0 to INT1, SWAIT (6) ATIPSYNC, Reserve0 to Reserve7 (7) ACK, ATN, BSY, C/D, DB0 to DB7, DBP, I/O, MSG, REQ, RST, SEL Note: The XTAL0, XTAL1, XTALCK0, and XTALCK1 pins are not included in these DC characteristic specifications. No. 5829-2/7 LC895926 Block Diagram Sub-code I/F de-interleave/interleave *1 *2 *3 *4 *6 *7 *8 *9 *10 *11 *12 WFCK, SBSO, SCOR BCK, SDATA, LRCK, C2PO DB0 to DB7, DBP, BSY, MSG, SEL, RST, REQ, I/O, C/D ACK, ATN RD, WR, SUA0 to SUA7, CS D0 to D7 IO0 to IO15 RA0 to RA9, RAS0, RAS1, CAS0, CAS1, OE, UWE, LWE PLLOUTIN, ROUGH, LOCKIN, BICLKIN, BIDATAIN LOCK, CLV+ (MDP), CLV- (MDS), MON, FSW SUBSYNC, EFM, EFMG, EFMGATE0 to EFMGATE3 No. 5829-3/7 LC895926 Pin Descriptions Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, N: No connection pin Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Pin Name VSS XTALCK0 XTAL0 TEST0 RESET VDD SUBSYNC EFMG EFM EFMGATE0 EFMGATE1 EFMGATE2 EFMGATE3 TEST1 Reserve0 Reserve1 Reserve2 Reserve3 Reserve4 VDD VSS Reserve5 Reserve6 Reserve7 TEST2 LOCKIN LOCK PLLOUTIN VSS ROUGH ATIPSYNC BICLKIN BIDATAI VDD VSS CLV+ (MDP) CLV- (MDS) MON FSW VDD VSS Type P I O I I P O O O O O O O I B B B B B P P B B B I I O I P I B I I P P O O O O P P 5V CLV servo signal output pin Rough CLV servo wobble signal input pin ATIP synchronization signal I/O pin Biphase data transfer clock input pin Biphase data input pin 3.3V Test pin (connect to VSS) CD decoder lock signal input pin CLV servo lock monitor pin Wobble signal carrier clock input pin Reserved for future expansion (connect to VSS if unused.) 3.3V Reserved for future expansion (connect to VSS if unused.) Test pin (connect to VSS) EFM pulse width detection gate signals Xtal oscillator circuit input pin (17.2872 MHz) Xtal oscillator circuit output pin Test pin (connect to VSS) Reset pin 5V Subcode synchronization signal output pin EFM output gate signal output pin EFM signal output pin Description Continued on next page. No. 5829-4/7 LC895926 Continued from preceding page. Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, N: No connection pin Pin Number 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 Pin Name IO0 IO1 IO2 IO3 IO4 IO5 VDD IO6 IO7 IO8 IO9 VSS IO10 IO11 IO12 IO13 IO14 IO15 VDD VSS RA0 RA1 RA2 RA3 RA4 RA5 RA6 VSS RA7 RA8 RA9 RAS0 RAS1 CAS0 CAS1 OE UWE LWE VDD VSS DB0 DB1 VDD DB2 DB3 VSS DB4 DB5 Type B B B B B B P B B B B P B B B B B B P P O O O O O O O P O O O O O O O O O O P P B B P B B P B B SCSI pins SCSI pins 3.3V SCSI pins RAS signal pins for ROM encoder/decoder DRAM Address signal pins for ROM encoder/decoder DRAM Address signal pins for ROM encoder/decoder DRAM 3.3V Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors 5V Data signal pins for ROM encoder/decoder DRAM, with pull-up resistors Description CAS signal pins for ROM encoder/decoder DRAM Output enable signal pin for ROM encoder/decoder DRAM Upper write enable signal pin for ROM encoder/decoder DRAM Lower write enable signal pin for ROM encoder/decoder DRAM 5V Continued on next page. No. 5829-5/7 LC895926 Continued from preceding page. Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power Supply pin, N: No connection pin Pin Number 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 Pin Name VDD DB6 VDD VSS DB7 DBP VDD VSS ATN BSY VDD VSS ACK RST VDD VSS MSG SEL VDD C/D VDD REQ I/O VSS XTALCK1 XTAL1 TEST3 TEST4 TEST5 BCK VDD VSS SDATA LRCK C2PO EXCK WFCK SBSO SCOR VSS SUA0 SUA1 SUA2 SUA3 SUA4 SUA5 SUA6 SUA7 Type P B P P B B P P B B P P B B P P B B P B P B B P I O I I I I P P I I I O I I I P I I I I I I I I Commande registor selection address input pins Serial data input pin 44.1 kHz strobe signal input pin C2 pointer input pin Subcode data read shift clock output pin Subcode frame synchronization input pin Subcode serial data input pin Subcode block synchronization input pin Xtal oscillator circuit input pin for SCSI interface (20 MHz) Xtal oscillator circuit output pin for SCSI interface Test pin (connect to VSS) Test pin (connect to VSS) Test pin (connect to VSS) Serial data input clock input pin 5V SCSI pins 3.3V SCSI pin 5V SCSI pins SCSI pins 5V SCSI pin SCSI pin 5V SCSI pins 5V 3.3V SCSI pin 5V Description Continued on next page. No. 5829-6/7 LC895926 Continued from preceding page. Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power Supply pin, N: No connection pin Pin Number 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 Pin Name WR RD VDD VSS CS D0 D1 D2 D3 D4 D5 D6 D7 SWAIT VDD INT0 INT1 TEST6 PD VCNT R VSS VDD Type I I P P I B B B B B B B B O P O O I O I I P P 3.3V Wait signal to microcontroller 5V Interrupt request signals to microcontroller. Open drain outputs with built-in pull-up resistors Test pin (connect to VSS) Charge pump output pin VCO control voltage pin VCO bias resistor pin Microcontroller data signal pins, with pull-up resistors Chip select signal from microcontroller Data write signal from microcontroller Data read signal from microcontroller 3.3V Description s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. PS No. 5829-7/7 |
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